Most often seven-segment displays are used to display the digits in digital watches, calculators, clocks, measuring instruments and digital counters, etc. Generally, LCD and LED segments provide the display output of numerical numbers and characters.
However to display the characters and numbers (in order to produce the decimal readout), seven-segment displays are most commonly used. Mostly these displays are driven by the output stages of digital ICs (to which the visual indication of the output stages has to be performed) such as latches and decade counters, etc.
But these outputs are in the form of 4-bit binary coded decimal (BCD), and not suitable for directly driving the seven segment displays.
A display decoder is used to convert a BCD or a binary code into a 7 segment code. It generally has 4 input lines and 7 output lines. Here we design a simple display decoder circuit using logic gates.
Even though commercial BCD to 7 segment decoders are available, designing a display decoder using logic gates may prove to be beneficial from economical as well as knowledge point of view.
The basic idea involves driving a common cathode 7-segment LED display using combinational logic circuit. The logic circuit is designed with 4 inputs and 7 outputs, each representing an input to the display IC. Using Karnough’s map, logic circuitry for each input to the display is designed.
Step 1: The first step of the design involves analysis of the common cathode 7-segment display. A 7-segment display consists of an arrangement of LEDs in an ‘H’ form. A truth table is constructed with the combination of inputs for each decimal number. For example, decimal number 1 would command a combination of b and c (refer the diagram given below).
Step 2: The second step involves constructing the truth table listing the 7 display input signals, decimal number and corresponding 4 digit binary numbers.
The truth table for the decoder design depends on the type of 7-segment display. As we mentioned above that for a common cathode seven-segment display, the output of decoder or segment driver must be active high in order to glow the segment.
The figure below shows the truth table of a BCD to seven-segment decoder with common cathode display. In the truth table , there are 7 different output columns corresponding to each of the 7 segments.
Suppose the column for segment a shows the different combinations for which it is to be.
illuminated. So ‘a’ is active for the digits 0, 2, 3, 5, 6, 7, 8 and 9.
Step 3: The third step involves constructing the Karnough’s map for each output term and then simplifying them to obtain a logic combination of inputs for each output.
Step 4: The final step involves drawing a combinational logic circuit for each output signal. Once the task was accomplished, a combinational logic circuit can be drawn using 4 inputs (A,B,C,D)and a 7- segment display (a,b,c,d,e,f,g) as output.
The circuit operation can be understood through the truth table itself. When all the inputs are connected to low logic , the output of the combinational logic circuit would be so as to drive all the output LEDs except ‘g’ to conduction. Thus the number 0 will be displayed. Similar operation would take place for all other combinations of the input switches.
Practically BCD to 7 segment decoders are available in form of integrated circuits such as 74LS47. Apart from regular 4 input pins and 7 output pins, it consists of a lamping test pin used for segment testing, ripple blanking input pin used to blank off zeros in multiple display systems, ripple blanking output pin used for cascading purposes and a blanking input pin.