Course Content

FPGA Based Digital Controller for DC-DC Buck Converter

Abstract

This paper presents performance analysis of Digital PWM control mode in DC-DC buck converter in terms of power efficiency, line regulation and load regulation. Matlab/Simulink Models are built to facilitate the analysis of various effects on power loss and conversion efficiency, including different load conditions. It introduces a fully synthesizable hybrid digital pulse width modulator (DPWM) utilizing Σ‒∆ modulation technique to achieve best possible resolution of 12 bit. A type-II compensator is designed for the buck converter in order to achieve a stable closed loop operation with desired performance. FPGA implementation is carried out for both type-II compensator and DPWM using Xilinx system generator tool. A load regulation of 4% with a response time of 200us is achieved for a load change of 0.4A to 0.8A.A line regulation of 2% with a response time of 100us is achieved for a line voltage change of 3 to 4.5V. A Graph of conversion efficiency versus load current is obtained